Submitted by francesco.orfei on
| Title | A tunable cache for approximate computing |
| Publication Type | Conference Paper |
| Year of Publication | 2014 |
| Authors | Sjalander M., Nilsson N.S., Kaxiras S. |
| Conference Name | Nanoscale Architectures (NANOARCH), 2014 IEEE/ACM International Symposium on |
| Date Published | July |
| Keywords | Accuracy, application data storage, approximate computing, binary format, cache design, cache storage, CMOS integrated circuits, CMOS scaling, complimentary metal oxide semiconductors, computer system design, Interference, Memory management, multi-value devices, multi-value logic, multivalued logic circuits, Performance evaluation, quaternary format, single electron transistors, Transfer functions, tunable cache |
| DOI | 10.1109/NANOARCH.2014.6880480 |
ICT-Energy group
